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We present a seven-bit multilayer true-time delay (TTD) circuit operating from 1 to 7 GHz for wideband phased array antennas. By stacking advanced substrates with low dielectric loss, the TTD with PCB process is miniaturized and has low insertion loss. The signal vias with surrounding ground vias are designed to provide impedance matching throughout the band, allowing the overall group delay to be flat. The standard deviation of the TTD for all states is below 19 ps, which is 1.87% of the maximum group delay. The maximum delay is 1016 ps with resolution of 8 ps. The implemented TTD is 36.6× 19.4 mm2 and consumes 0.65 mW at 3.3 V supply for all the delay states. The measured input/output return loss is better than 12.1 dB for the band of 1–7 GHz. key words: true-time delay, wideband phased array, multilayer PCB, signal via

7-Bit Multilayer True-Time Delay up to 1016ps for Wideband Phased Array Antenna