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This letter reports a column-parallel clock skew self-calibration circuit for time-resolved (TR) CMOS image sensors. In TR CMOS imagers, as the time resolution increases, the skew of gating clock between pixels becomes a difficult problem because the clock skew causes the reduction of measurable maximum range in particular pixels or unmeasurable pixels. To calibrate the skew in short time, a column-parallel skew self-calibration circuit based on two-stage delay line and a dual clock tree is proposed. The experimental results show that the skew calibration circuit successfully reduces the skew from 247 psrms to 25 psrms, and the calibration time is only 12 μs, which is much faster than the previous work.

A column-parallel clock skew self-calibration circuit for time-resolved CMOS image sensors