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In this work we present, in the context of the transition from amplitude to robust spike domain sensing and electronics, a floating memristor. It can be used to construct memristor SNNs used for noise-robust conditioning and analog-to-digital conversion and manufactured using leading-edge technologies with more ’cranky’ devices, low-voltage, low power, and minimal area on-chip. Also, this supports both machine learning as well as the self-x properties in advanced sensor electronics system for industry 4.0. The proposed memristor has less design complexity and a higher number of resistance levels as compared to other existing memristors. The proposed CMOS memristor is designed using AMS 0.35  μ m CMOS technology and Cadence design tools. Its layout occupies an area of 70  μ m × 85  μ m. The simulation shows the performance of the proposed floating memristor emulator in the temperature range (-40 °C to 85 °C) and Monte-Carlo simulation.

tm - technisches messen

A Compact Four Transistor CMOS-Design of a Floating Memristor for Adaptive Spiking Neural Networks and Corresponding Self-X Sensor Electronics to Industry 4.0