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Rethinking analog to digital conversion has become extremely crucial in the race towards aggressively scaled technology nodes with decaying signal swings. The concept of more recent TDCs, which are completely designed in digital domain, make them simpler, easier to manufacture and faster to market. In previous work, LUCOS  J. Doge, G. Schonfelder, G. Streil, and A. Konig. An HDR CMOS image sensor with spiking pixels, pixel-level ADC, and linear characteristics.  Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on , 49(2):155–158, Feb 2002.  , a high dynamic range image sensor using spike based processing with high pixel uniformity had been designed. This motivated a generic ADC concept, which makes use of spike processing, to design a highly effective sensor signal processing system, which carries the promise of robustness to technology scaling, for effective use in IoT and Industrie 4.0. In this work, an ADC concept based on acoustic localization in biological sensory systems has been pursued. An ADC has been designed based on this concept using biological models of spiking neurons. The first proof-of-concept prototype chip SSDC α  has been designed in ams 350 nm technology node with area of the chip is 8.5 mm 2 , sampling rate from DC to 150 kHz, resolution from 8-bit to 13-bit, with 28, 200 transistors, 263 neurons and 517 synapses. The future work will move from 350 nm to 90 nm technology node to show the improvement and robustness of the SSDC with technology scaling.

SSDC α – Inherently robust integrated biomimetic sensor-to-spike-to-digital converter based on peripheral neural ensembles