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The SpaceWire is a standard for high-speed links and networks used onboard spacecrafts, designed by the ESA, and widely used on many space missions by multiple space agencies. SpaceWire has shown a great flexibility by giving the space missions a wide range of possible configurations and topologies. Nevertheless, each topology presents its own set of tradeoffs such as hardware limitations, speed performance, power consumption, costs of implementation, etc. In order to compensate these drawbacks and increase the efficiency of the SpaceWire networks, many solutions are being considered. One of these solutions is the Network on Chip or NoC configuration which resolves many of these drawbacks by reducing the complexity of designing with a regular architecture improving speed, power, and reliability and guaranteeing a controlled structure. This paper presents the main steps for building Network on Chip based on the SpaceWire protocol. It describes the internal structure, the functioning and the communication mechanism of the Network's Nodes. It also exposes the software development and the validation strategy, and discusses the tests and results conducted on the adopted NoC topologies.

Design and Implementation of NoC architectures based on the SpaceWire protocol