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A Study of Floorplanning Challenges and Analysis of macro placement approaches in Physical Aware Synthesis
Author(s) -
Shivani Garg,
Neeraj Shukla
Publication year - 2016
Publication title -
international journal of hybrid information technology
Language(s) - English
Resource type - Journals
eISSN - 2652-2233
pISSN - 1738-9968
DOI - 10.14257/ijhit.2016.9.1.24
Subject(s) - floorplan , macro , placement , physical design , computer science , quality (philosophy) , design flow , very large scale integration , high level synthesis , embedded system , circuit design , epistemology , programming language , field programmable gate array , philosophy
The macro placement is a governing factor in design flow in terms of timing criticality and congestion metrics. Also tape-out schedules are affected because of quality of macro placement or floorplanning. As hierarchical approach is followed for design closure today, there are multiple macro iterations back and forth between synthesis and implementation tool until the design meet all timing and design constraints. Traditional flow takes much time to figure out the best floorplan in terms of timing, Quality of results (QoR) and congestion. Now, physical aware synthesis gives a user an opportunity to cut the implementation time at later stages. The approach used here is RTL level floorplanning to enhance the quality of floorplan and also save multiple iterations. In one shot we get automatic floorplan initially generated by tool and then used by Place and Route (P&R) team for further processing. Also a rough estimate of wire delays and routes to calculate parasitic value, hence delays is obtained. There are multiple ways of placing macros in a floorplan which varies with shape of die and core utilization of design. So when multi macro placement approaches are applied simultaneously, then one can choose the best floorplan in terms of QoR and design metrics and then take it to implementation tool. After studying floorplan and macro placement challenges, there is a need to reduce cycle time between synthesis and implementation tool. In this work, different macro placement approaches are applied on design for different shapes of die (rectangular and rectilinear) using various parameters and then analyzed the timing, design metrics and congestion of various approaches. The results obtained show that every macro placement approach has different effect for different types of die on timing, congestion and power. Thus we can easily automate floorplanning for different shapes of die and reduce cycle time from months to few weeks. As checked on a design with 500k instances and 18 macros, with utilization of 59% if rectangular die is chosen the approach 3rd gives best result in congestion of 0.1% and the cycle time reduced from weeks to days.

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