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Stateful Packet Inspection (SPI) is the most important area of Network Intrusion Detection Systems (NIDS (However it must be operated in multi-Gigabit speeds, to trace and reassemble every connection, and examine every packet flow. I proposed Stateful Packet Inspection for Multi Gigabits Networks (SPIMN). It is customized hardware to achieve a more efficient and faster online inspection system. A generic architecture of SPIMN is based on using FPGA and Header Inspection. Therefore, Xilinx ISE 14.1 used in the design and in the simulation to test the design before the implementation on FPGA Virtex-7 by creating a Test-bench circuit. Finally, the testing and evaluation of SPIMN indicate that this model can work with more than 2,000 Snort rules on 100 Gigabit Ethernet networks.

SPIMN Stateful Packet Inspection for Multi Gigabits Networks