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In this paper, a nano-watt resistorless subthreshold voltage reference with high-power supply rejection ratio (PSRR) is presented. A self-biased MOS voltage divider is proposed to provide bias current for whole voltage reference, which is a positive temperature coefficient (TC) current containing threshold voltage characteristics. By injecting the generated current into a transistor with a different threshold voltage, a delta threshold voltage with a greatly reduced negative TC is realized and temperature-compensated by a generated positive TC item at the same time. Therefore, a temperature-stable voltage reference is achieved in the proposed compacted method with low power consumption and high PSRR. Verification results with 65-nm CMOS technology demonstrate that the minimum supply voltage can be as low as 0.35 V with a 0.00182-mm 2  active area. The generated reference voltage is 148 mV, with a TC of 28 ppm/°C for the − 30 to 80 °C temperature range. The line sensitivity is 1.8 mV/V, and the PSRR without any filtering capacitor at 100 Hz is 53 dB with a 2.28-nW power consumption.

A Nanoscale Low-Power Resistorless Voltage Reference with High PSRR