Open AccessFPGA Based Packet Classification Using Multi-Pipeline Architecture
Author(s) -
R. Sathesh Raaj
Publication year - 2015
Publication title -
international journal of wireless communications and mobile computing
Language(s) - Uncategorized
Resource type - Journals
eISSN - 2330-1015
pISSN - 2330-1007
DOI - 10.11648/j.wcmc.20150303.11
Subject(s) - computer science , header , pipeline (software) , network packet , tuple space , tuple , throughput , decision tree , packet processing , field programmable gate array , parallel computing , computer network , data mining , computer hardware , operating system , mathematics , discrete mathematics , wireless
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