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Multiple, high-level operators are assigned to a general operand. The operators are implemented with individual micro-processors and are “attached” dynamically to the memory location representing the “current” value of the operand. The operators then asynchronously use each new operand value as it is stored and perform their operations in parallel. The proposed architecture represents a true M I S D (Multiple instruction Stream - Single Data Stream) computer. Its architecture can provide effective parallelism and reduced programming complexity for a large class of both numeric and non-numeric computer problems.

Functional parallelism in an operand state saving computer