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Many graph-coloring register-allocation algorithms don't work well for machines with few registers. Heuristics for live-range split- ting are complex or suboptimal; heuristics for register assignment rarely factor the presence of fancy addressing modes; these prob- lems are more severe the fewer registers there are to work with. We show how to optimally split live ranges and optimally use address- ing modes, where the optimality condition measures dynamically weighted loads and stores but not register-register moves. Our al- gorithm uses integer linear programming but is much more efficient than previous ILP-based approaches to register allocation. We then show a variant of Park and Moon's optimistic coalescing algorithm that does a very good (though not provably optimal) job of remov- ing the register-register moves. The result is Pentium code that is 9.5% faster than code generated by SSA-based splitting with iter- ated register coalescing.

Optimal spilling for CISC machines with few registers