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We present an evaluation of 32-bit POSIT arithmetic through itsimplementation as accelerators on FPGAs and GPUs. POSIT, a floating-pointnumber format, adaptively changes the size of its fractional part. We developedhardware designs for FPGAs and software for GPUs to accelerate linear algebraoperations using Posit(32,2) arithmetic. Our FPGA- and GPU-based acceleratorsin Posit(32,2) arithmetic significantly accelerated the Cholesky and LUdecomposition algorithms for dense matrices. In terms of numerical accuracy,Posit(32,2) arithmetic is approximately 0.5 - 1.0 digits more accurate than thestandard 32-bit format, especially when the norm of the elements of the inputmatrix is close to 1. Evaluating power consumption, we observed that the powerefficiency of the accelerators ranged between 0.043 - 0.076 Gflops/watts forthe LU decomposition in Posit(32,2) arithmetic. The power efficiency of thelatest GPUs as accelerators of Posit(32,2) arithmetic is better than that ofthe evaluated FPGA chip.

Evaluation of POSIT Arithmetic with Accelerators