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Sparse tensor algebra is a challenging class of workloads to accelerate dueto low arithmetic intensity and varying sparsity patterns. Prior sparse tensoralgebra accelerators have explored tiling sparse data to increase exploitabledata reuse and improve throughput, but typically allocate tile size in a givenbuffer for the worst-case data occupancy. This severely limits the utilizationof available memory resources and reduces data reuse. Other accelerators employcomplex tiling during preprocessing or at runtime to determine the exact tilesize based on its occupancy. This paper proposes a speculative tensor tilingapproach, called overbooking, to improve buffer utilization by taking advantageof the distribution of nonzero elements in sparse tensors to construct largertiles with greater data reuse. To ensure correctness, we propose a low-overheadhardware mechanism, Tailors, that can tolerate data overflow by design whileensuring reasonable data reuse. We demonstrate that Tailors can be easilyintegrated into the memory hierarchy of an existing sparse tensor algebraaccelerator. To ensure high buffer utilization with minimal tiling overhead, weintroduce a statistical approach, Swiftiles, to pick a tile size so that tilesusually fit within the buffer's capacity, but can potentially overflow, i.e.,it overbooks the buffers. Across a suite of 22 sparse tensor algebra workloads,we show that our proposed overbooking strategy introduces an average speedup of$52.7\times$ and $2.3\times$ and an average energy reduction of $22.5\times$and $2.5\times$ over ExTensor without and with optimized tiling, respectively.

Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity