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An experimental implementation of a design for an adaptive, parallel finite-element system is described. The implementation was used to simulate the performance of this design on several microprocessor-based multiprocessor architectures The real-time speedup observed was architectureindependent, but hmited. Nevertheless, the approach to data segmentation and management worked well and has interesting applications.

A Quantitative Evaluation of the Feasibility of, and Suitable Hardware Architectures for, an Adaptive, Parallel Finite-Element System