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Moving data through the memory hierarchy is a fundamental bottleneck that canlimit the performance of core algorithms of machine learning, such asconvolutional neural networks (CNNs). Loop-level optimization, including looptiling and loop permutation, are fundamental transformations to reduce datamovement. However, the search space for finding the best loop-leveloptimization configuration is explosively large. This paper develops ananalytical modeling approach for finding the best loop-level optimizationconfiguration for CNNs on multi-core CPUs. Experimental evaluation shows thatthis approach achieves comparable or better performance than state-of-the-artlibraries and auto-tuning based optimizers for CNNs.

Analytical Characterization and Design Space Exploration for Optimization of CNNs