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Heterogeneous manycore architectures are the key to efficiently executecompute- and data-intensive applications. Through silicon via (TSV)-based 3Dmanycore system is a promising solution in this direction as it enablesintegration of disparate computing cores on a single system. However, theachievable performance of conventional through-silicon-via (TSV)-based 3Dsystems is ultimately bottlenecked by the horizontal wires (wires in eachplanar die). Moreover, current TSV 3D architectures suffer from thermallimitations. Hence, TSV-based architectures do not realize the full potentialof 3D integration. Monolithic 3D (M3D) integration, a breakthrough technologyto achieve - More Moore and More Than Moore - and opens up the possibility ofdesigning cores and associated network routers using multiple layers byutilizing monolithic inter-tier vias (MIVs) and hence, reducing the effectivewire length. Compared to TSV-based 3D ICs, M3D offers the true benefits ofvertical dimension for system integration: the size of a MIV used in M3D isover 100x smaller than a TSV. In this work, we demonstrate how M3D-enabledvertical core and uncore elements offer significant performance and thermalimprovements in manycore heterogeneous architectures compared to its TSV-basedcounterpart. To overcome the difficult optimization challenges due to the largedesign space and complex interactions among the heterogeneous components (CPU,GPU, Last Level Cache, etc.) in an M3D-based manycore chip, we leverage noveldesign-space exploration algorithms to trade-off different objectives. Theproposed M3D-enabled heterogeneous architecture, called HeM3D, outperforms itsstate-of-the-art TSV-equivalent counterpart by up to 18.3% in execution timewhile being up to 19 degrees Celcius cooler.

HeM3D: Heterogeneous Manycore Architecture Based on Monolithic 3D Vertical Integration