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We consider the fundamental problem of constructing fast circuits for thecarry bit computation in binary addition. Up to a small additive constant, thecarry bit computation reduces to computing an \aop, i.e., a formula of type$t_0 \land (t_1 \lor (t_2 \land ( \dots t_{m-1}) \dots )$ or $t_0 \lor (t_1\land (t_2 \lor ( \dots t_{m-1}) \dots )$. We present an algorithm thatcomputes the fastest known Boolean circuit for an \aop~ with given arrivaltimes $a(t_0), \dotsc, a(t_{m-1})$ for the input signals. Our objectivefunction is delay, a natural generalization of depth with respect to arrivaltimes. The maximum delay of the circuit we compute is $\log_2 W + \log_2 \log_2m + \log_2 \log_2 \log_2 m + 4.3$, where $W := \sum_{i = 0}^{m-1} 2^{a(t_i)}$.Note that $\lceil \log_2 W \rceil$ is a lower bound on the delay of any circuitdepending on inputs $t_0, \dotsc, t_{m-1}$ with prescribed arrival times. Ourmethod yields the fastest circuits for \aop s, carry bit computation and addersin terms of delay known so far.

Faster Carry Bit Computation for Adder Circuits with Prescribed Arrival Times