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In order to optimize interconnect to avoid signal integrity problems, very fast and accurate 3-D capacitance ex- traction is essential. Fast algorithms, such as the multipole or precorrected Fast Fourier Transform (FFT) accelerated methods in programs like FASTCAP, must be combined with techniques to exploit the emerging cluster-of-workstation based parallel com- puters like the IBM SP2. In this paper, we examine parallelizing the precorrected FFT algorithm for 3-D capacitance extraction and present several algorithms for balancing workload and re- ducing communication time. Results from a prototype implemen- tation on an eight processor IBM SP2 are presented for several test examples, and the largest of these examples achieves nearly linear parallel speed-up. I. INTRODUCTION Finding signal integrity problems in high performance integrated circuits and integrated circuit packaging is extremely difficult, pri- marily because these problems are typically created by the detailed interactions between hundreds of conductors. Although 3-D simu- lation tools can help designers find signal integrity problems, even the fastest of these tools running on a scientific workstation are too slow to allow a designer to quickly investigate a variety of conductor layouts. Therefore, reducing analysis turn-around time is critical, and can result in 3-D simulation being used as part of design optimization rather than just a-posteriori verification. One approach to reducing simulation turn-around time is to exploit the recently developed parallel computers based on clusters of scien- tific workstations, like the IBM SP2. Achieving efficiency using the distributed parallelism available from clusters of workstations is more challenging than using a specialized parallel supercomputer. Even with an enhanced communication networks, it will not be possible to achieve good parallel efficiency with workstation clusters by relying on huge volumes of short messages. In this paper we demonstrate that turn-around time for fast 3-D capacitance extraction can be substantially reduced using a cluster- of-workstations based parallel computer. In the next section we present background on 3-D capacitance extraction, and describe one of the recently developed fast methods for computing capacitances, the precorrected-FFT accelerated method (1). In Section 3 we de- scribe the algorithms used to parallelize the precorrected-FFT based capacitance extraction program and in Section 4 computational results are presented. Conclusions are given in Section 5.

A parallel precorrected FFT based capacitance extraction program for signal integrity analysis