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We show how to quantify the suboptimality ofheuristic algorithms for NP-hard problems arising inVLSI layout. Our approach is based on the notion ofconstructing new scaled instances from an initial probleminstance. From the given problem instance, weessentially construct doubled, tripled, etc. instanceswhich have optimum solution costs at most twice,three times, etc. that of the original instance. Byexecuting the heuristic on these scaled instances, andthen comparing the growth of...

Quantified suboptimality of VLSI layout heuristics