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The software operating systems for the Control Data 64/6600 Extended Core Storage (ECS) have been described in another paper. The ESC is organized basically as a very large word two wire magnetic core memory with multi-phased banks. The use of multi-bank phasing and very large memory word construction has allowed the basic core to operate at a reasonable cycle time of 3.2 microseconds while providing an average data rate of 600 mega bits per second. The purpose of this paper is to describe the design of the basic memory hardware required to operate a very large word memory.

Extended core storage for the control data 64/6600 systems