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The author's goal in this book is to demonstrate that while efficient code and architecture-independent programming might eventually come together, the state of the art requires architecture-specific programming to obtain efficient code. Robert chooses to show this by selecting a single problem (Gaussian elimination) and programming it on different architectures. The book is divided into three parts. The first part (2 chapters) introduces Gaussian elimination and parallel architectures. The second part, Parallel Algorithm Design (3 chapters), discusses algorithmic and implementation issues for three different architectural models: shared-memory vector multipro-cessors, MIMD distributed-memory machines, and systolic arrays. The final part, Models and Tools (3 chapters), discusses performance analysis and algorithm design techniques for these architectures. Only two chapters (58 pages) of the book deal with the matter suggested by the title of the book. The choice of systolic arrays as the third architectural example seems out-of-place, since the 51 pages devoted to this model are largely theoretical and has little in coth-mon with the rest of the book. While these chapters do provide a comprehensive description of the systolic array literature on Gaus-sian elimination, I feel that SIMD architec-tures would have been a more appropriate choice. Further, the two specific machines discussed (the IBM 3090 and the FPS T Series) are not particularly representative. Robert discusses at length the effect of nonunit stride in the 3090. The results, however, are quite different from what is observed on Cray or Hi-tachi machines. By Robert's own admission, the FPS machine is obsolete. One of the Intel machines would have been a better choice. Robert makes some curious choices regarding material. For instance, in the shared-memory model, he describes at great length some very complex and unintuitive "optimal" algorithms (whose "optimality" is not verified through implementation), but makes no mention of loop transformations, especially of loop blocking. The various levels of BLAS are mentioned , but I feel that a more complete treatment of blocking issues was warranted. The use of non-standard terminology makes the text unclear in places. For instance, Robert uses "three interleaved loops" when he means "three nested loops", and "loop sec-tioning" for "strip mining". "SPMD" is not a kind of computer architecture as the author claims, but a programming style. And "PRAM" stands for Parallel Random Access Machine, not Parallel Random Access Memory. There are several factual errors in the text. On p. 62, Robert states that "summation is inherently sequential". …

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Book review: The Impact of Vector and Parallel Architectures on the Gaussian Elimination Algorithm by Yves Robert (Manchester University Press and Halsted Press, 1991)