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We show that a class of CMOS circuits is a testable realization and static CMOS circuits synthesized by some existing synthesis systems belongs to this class. We propose a more “direct” solution to the problem of computing robust test-pairs for stuck-open faults by defining a new six-valued logic. This in turn gives us a solution to the problem of identifying stuck-open testable circuits.

On synthesizing and identifying stuck-open testable CMOS combinational circuits (extended abstract)