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In a previous paper [8], we had presented the notion of a family of languages for the multilevel design and description of computer architectures. Details of a particular language family, currently under development, was also described. One of the constituent members of this family is S@@@@, intended for the specifications of the outer (or exo-) and inner (or endo-) architectures of general purpose von Neumann style computers. In this paper we describe the formalization and application of S@@@@ to the formalproofs of correctness of architecture designs.

On the verification of computer architectures using an architecture description language