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IDeF-X HD is a 32-channel analog front-end with self-triggering capability optimized for the readout of [Formula: see text] pixels CdTe or CdZnTe pixelated detectors to build a low power micro-gamma camera. IDeF-X HD has been designed in the standard AMS CMOS 0.35[Formula: see text][Formula: see text]m process technology. Its power consumption is 800[Formula: see text][Formula: see text]W per channel. The energy range of the ASIC can be extended to 1.1[Formula: see text]MeV thanks to the in-channel adjustable gain stage. When no detector is connected to the chip and without input current, a 33 electrons rms ENC level is achieved after shaping with 10.7[Formula: see text][Formula: see text]s peaking time. Spectroscopy measurements have been performed with CdTe Schottky detectors. We measured an energy resolution of 4.2[Formula: see text]keV FWHM at 667[Formula: see text]keV ([Formula: see text]Cs) on a single-pixel configuration. Meanwhile, we also measured 562[Formula: see text]eV and 666[Formula: see text]eV FWHM at 14[Formula: see text]keV and 60[Formula: see text]keV, respectively ([Formula: see text]Am) with a 256 small pixel array and a low detection threshold of 1.2[Formula: see text]keV. Since IDeF-X HD is intended for space-borne applications in astrophysics, we evaluated its radiation tolerance and its sensitivity to single event effects. We demonstrated that the ASIC remained fully functional without significant degradation of its performances after 200 krad and that no single event latch-up was detected putting the linear energy transfer threshold above 110[Formula: see text]MeV/(mg/cm 2 ). Good noise performance and radiation tolerance make the chip well suited for X-rays energy discrimination and high energy resolution. The chip is space qualified and flies on board of the solar orbiter ESA mission launched in 2020.

IDeF-X HD: A CMOS ASIC for the Readout of Cd(Zn)Te Detectors for Space-Borne Applications