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We report on the co-integration of an additional passive layer within a Silicon Photonic chip for advanced passive devices. Being a CMOS compatible material, Silicon Nitride (SiN) appears as an attractive candidate. With a moderate refractive index contrast compared to SOI, SiN based devices would be intrinsically much more tolerant to fabrication errors while keeping a reasonable footprint. In addition, it's seven times lower thermo-optical coefficient, relatively to Silicon, could lead to thermal-tuning free components. The co-integration of SiN on SOI has been explored in ST 300mm R and D photonic platform DAPHNE and is presented in this paper. Surface roughness of the SiN films have been characterized through Atomic Force Microscopy (AFM) showing an RMS roughness below 2nm. The film thickness uniformity have been evaluated by ellipsometry revealing a three-sigma of 21nm. Statistical measurements have been performed on basic key building blocks such as SiN strip waveguide showing propagation loss below 0.7dB/cm and 40μm radius bends with losses below 0.02dB/90°. A compact Si-SiN transition taper was developed and statistically measured showing insertion losses below 0.17dB/transition on the whole O-band wavelength range. Moreover, advanced WDM devices such as wavelength-stabilized directional couplers (WSDC) have been developed.

Integrated SiN on SOI dual photonic devices for advanced datacom solutions