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A promising predictive parallel event-driven logic simulation had been proposed for greatly enhancing the parallel simulation performance, which could be heavily disturbed by synchronization & communication overhead among local simulations. For achieving the maximal simulation performance in the predictive parallel event-driven logic simulation, the high prediction accuracy is the key factor. In this paper, we have enhanced this noble parallel simulation method with fast, yet accurate prediction using incremental simulation. Preliminary experimentation has been performed for common design changes, and shown the effectiveness of the proposed approach.

Predictive Parallel Gate-level Timing Simulation with Fast and Accurate Prediction