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Extended Abstract Subthreshold swing (SS) is an important metric for the performance of field-effect transistors (FETs). The SS represents the change in gate voltage which must be applied in order to create a one decade increase in the output current. The smaller SS is better for the device because the off-state leakage current (Ioff) can be minimized while maintaining higher on-state current (Ion). SS can be minimized in non-bulk planar MOSFET, such as FinFETs and FD-SOI. However, there is a theoretical limitation of 60 mv/dec. To overcome the limitation, tunnelling FET (TFET) has been suggested [1]. There is no limitation of SS because a band-to-band tunneling (BTBT) is utilized for current conduction in TFET. Since the TFET can use CMOS process like the conventional MOSFET, it is considered as the promising candidate among the next-generation devices. However, TFET has a weakness of having a low level of on-state current. A bipolar-enhanced tunneling FET (BETFET) has been suggested to solve such weakness of the conventional TFET [2]. The BET-FET is a device which has added a BJT effect onto the TFET. It turns improving a saturation current. BET-FET is integrated a n-type onto a double gate ptype TFET (n-i-p) structure and allows a saturation current to have a BJT effect on its TFET current. In this study, the compact modelling of the BET-FET, which fully utilizes benefits of the SS while compensating weaknesses of the TFET, is realized. First, the tunnelling current is modelled for the quantum tunnelling between body and source. The point tunnel model is used for the simplicity [3]. Second, the diffusion current from the base to drain is also modelled, which determines a voltage of the base with the tunnelling current. Third, the BJT current, which amplifies a tunnelling current at the BET-FET, is modelled. The BJT current is modulated by the base voltage. Abnormal leakage current at off-state, which is dependent on the drain bias, is also analysed and modelled. All the current models are implemented in SPICE by Verilog-A language. The results of the model for the BET-FET are verified with the results of the TCAD simulation, which shows good agreement on various device structures and bias conditions. It would be possible to forecast a current by using the robust model for the future study of the BET-FET. Also, it would be suitable for the simulation of circuits in which a number of BET-FETs are directly linked.

Compact Model of BJT enhanced Tunnel Field Effect Transistor