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The open-source RISC-V ISA is gaining traction, both in industry andacademia. The ISA is designed to scale from micro-controllers to server-classprocessors. Furthermore, openness promotes the availability of variousopen-source and commercial implementations. Our main contribution in this workis a thorough power, performance, and efficiency analysis of the RISC-V ISAtargeting baseline "application class" functionality, i.e. supporting the LinuxOS and its application environment based on our open-source single-issuein-order implementation of the 64 bit ISA variant (RV64GC) called Ariane. Ouranalysis is based on a detailed power and efficiency analysis of the RISC-V ISAextracted from silicon measurements and calibrated simulation of an Arianeinstance (RV64IMC) taped-out in GlobalFoundries 22 FDX technology. Ariane runsat up to 1.7 GHz and achieves up to 40 Gop/sW peak efficiency. We give insightinto the interplay between functionality required for application-classexecution (e.g. virtual memory, caches, multiple modes of privileged operation)and energy cost. Our analysis indicates that ISA heterogeneity and simplercores with a few critical instruction extensions (e.g. packed SIMD) cansignificantly boost a RISC-V core's compute energy efficiency.

The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-ready 1.7GHz 64bit RISC-V Core in 22nm FDSOI Technology