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Small animal Positron Emission Tomography (PET) is dedicated to small animalimaging, which requires high position and energy precision, as well as goodflexibility and efficiency of the electronics. This paper presents the designof a digital signal processing logic for a marmoset brain PET system based onLYSO crystal arrays, SiPMs, and the resistive network readout method. Weimplement 32-channel signal processing in a single Xilinx Artix-7Field-Programmable Gate Array (FPGA). The logic is designed to support fouronline modes which are regular data processing mode, flood map constructionmode, energy spectrum construction mode, and raw data mode. Several functionsare integrated, including two-dimensional (2D) raw position calculation,crystal locating, events filtering, and synchronization detection. Furthermore,a series of online corrections is also integrated, such as photon peakcorrection to 511 keV and time measurement result correction with crystalgranularity. A Gigabit Ethernet interface is utilized for data transfer,Look-Up Tables (LUTs) configuration, and command issuing. The pipeline logicworks at 125 MHz with a signal processing capability beyond the required datarate of 1,000,000 events/s/channel. A series of initial tests are conducted.The results indicate that the logic design meets the application requirement.

Real-Time FPGA-based Digital Signal Processing and Correction for a Small Animal PET