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This paper presents an RDMA over Ethernet protocol used for data acquisitionsystems, currently under development at the ESRF. The protocol is implementedon Xilinx Ultrascale + FPGAs thanks to the 100G hard MAC IP. The proposedprotocol is fairly compared with the well-known RoCE-V2 protocol using acommercial network adapter from Mellanox. Obtained results show the superiorityof the proposed algorithm over RoCE-V2 in terms of data throughput. Performancetests on the 100G link show that it can reach a maximum stable link performanceof 90 Gbps with minimum packets sizes greater than 1KB and 95Gbps for packetsizes greater than 32KB.

FPGA Implementation of RDMA-Based Data Acquisition System Over 100 GbE