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The main role of the ITER Radial Neutron Camera (RNC) diagnostic is tomeasure in real-time the plasma neutron emissivity profile at high peak countrates for a time duration up to 500 s. Due to the unprecedented highperformance conditions and after the identification of critical problems, a setof activities have been selected, focused on the development of high priorityprototypes, capable to deliver answers to those problems before the final RNCdesign. This paper presents one of the selected activities: the design,development and testing of a dedicated FPGA code for the RNC Data Acquisitionprototype. The FPGA code aims to acquire, process and store in real-time theneutron and gamma pulses from the detectors located in collimated lines ofsight viewing a poloidal plasma section from the ITER Equatorial Port Plug 1.The hardware platform used was an evaluation board from Xilinx (KC705) carryingan IPFN FPGA Mezzanine Card (FMC-AD2-1600) with 2 digitizer channels of 12-bitresolution sampling up to 1.6 GSamples/s. The code performs the proper inputsignal conditioning using a down-sampled configuration to 400 MSamples/s, applydedicated algorithms for pulse detection, filtering and pileup detection, andincludes two distinct data paths operating simultaneously: i) the event-baseddata-path for pulse storage; and ii) the real-time processing, with dedicatedalgorithms for pulse shape discrimination and pulse height spectra. Forcontinuous data throughput both data-paths are streamed to the host through twodistinct PCIe x8 Direct Memory Access (DMA) channels.

FPGA code for the data acquisition and real-time processing prototype of the ITER Radial Neutron Camera