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To achieve the aim of the ITER Radial Neutron Camera Diagnostic, the dataacquisition prototype must be compliant with a sustained 2 MHz peak event foreach channel with 128 samples of 16 bits per event. The data is acquired andprocessed using an IPFN FPGA Mezzanine Card (FMC-AD2-1600) with 2 digitizerchannels of 12-bit resolution and a sampling rate up to 1.6 GSamples/s mountedin a PCIe evaluation board from Xilinx (KC705) installed in the host PC. Theacquired data in the event-based data-path is streamed to the host through thePCIe x8 Direct Memory Access (DMA) with a maximum data throughput per channelis 0.5 GB/s of raw data (event base), 1 GB/s per digitizer and up to 1.6 GB/sin continuous mode. The prototype architecture comprises an host PC with twoKC705 modules and four channels, producing up to 2 GB/s in event mode and up to3.2 GB/s in continuous mode. To reduce the produced data throughput from hostto ITER databases, the real-time data compression was evaluated using the LZ4lossless compression algorithm, which provides compression speed up to 400 MB/sper core. This paper presents the architecture, implementation and test of theparallel real-time data compression system running in multiple isolated cores.The average space saving and the performance results for long term acquisitionsup to 30 minutes, using different data block size and different number of CPUs,is also presented.

Real-time data compression for data acquisition systems applied to the ITER Radial Neutron Camera