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High sampling speed can be achieved using multiple analog-to-digital converters (ADCs) based on the time-interleaved analog-to-digital conversion (TIADC) technique. Various types of methods were proposed to correct the mismatch errors among parallel ADC channels in TIADC systems, which would deteriorate the system performance. Traditional correction methods based on digital signal processing have good performance, however, often only for input signals limited in a narrow frequency band. In this paper, we present our recent work on the design of an 8-Gs/s 12-bit TIADC system and the implementation of real-time mismatch correction algorithms in field programmable gate array devices, over a broadband of input signal frequencies. Tests were also conducted to evaluate the system performance, and the results indicate that the effective number of bits is enhanced to be better than 8.5 bits (&lt;;800 MHz) and 8 bits from 800 MHz to 1.6 GHz after correction, almost the same with that of the ADC chip employed.

An 8-Gs/s 12-Bit TIADC System With Real-Time Broadband Mismatch Error Correction