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We report a new InP/GaAsSb double heterojunction bipolar transistor (DHBT) emitter fin architecture with a record <inline-formula> <tex-math notation="LaTeX">${f}_{\mathrm {MAX}} =1.2$ </tex-math></inline-formula> THz, a simultaneous <inline-formula> <tex-math notation="LaTeX">${f}_{\mathrm {T}} =475$ </tex-math></inline-formula> GHz, and <inline-formula> <tex-math notation="LaTeX">$BV_{\mathrm {CEO}} =5.4$ </tex-math></inline-formula> V. The resulting <inline-formula> <tex-math notation="LaTeX">$BV_{\mathrm {CEO}}\,\times \,{f}_{\mathrm {MAX}} =6.48$ </tex-math></inline-formula> THz-V is unparalleled in semiconductor technology. Devices were realized with a 20-nm-thick compositionally and impurity graded GaAsSb-base and a 125-nm InP collector. The performance arises because the process allows: 1) a tunable base&#x2013;emitter access distance down to 10 nm; 2) the use of thicker base contact metals; and 3) the minimization of parasitic capacitances and resistances via precise lateral wet etching of the base&#x2013;collector (B/C) mesa. Perhaps more significantly, InP/GaAsSb DHBTs with <inline-formula> <tex-math notation="LaTeX">${f}_{\mathrm {MAX}} \ge1$ </tex-math></inline-formula> THz are demonstrated with emitter lengths as long as 9.4 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> and areas as high as 1.645 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula><sup>2</sup>. Such an area is &#x003E;<inline-formula> <tex-math notation="LaTeX">$6\times $ </tex-math></inline-formula> larger than previously reported terahertz (THz) DHBTs, representing a breakthrough in THz transistor scalability. This attractive performance level is achieved with a very low dissipated power density which makes InP/GaAsSb DHBTs well-suited for high-efficiency millimeter- and submillimeter-wave applications. Furthermore, we provide the first large-signal characterization of a THz transistor with 94 GHz load-pull measurements showing a peak power-added-efficiency (PAE) of 32.5&#x0025; (40&#x0025; collector efficiency) and a maximum saturated power of 6.67 mW/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula><sup>2</sup> or 1.17 mW/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> of emitter length in a common-emitter configuration. Devices operate stably under large-signal conditions, with voltages nearly twice higher than those for peak small-signal performance.

InP/GaAsSb Double Heterojunction Bipolar Transistor Emitter-Fin Technology With fMAX = 1.2 THz

InP/GaAsSb Double Heterojunction Bipolar Transistor Emitter-Fin Technology With f_MAX = 1.2 THz