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This paper investigates the degradation of GaN-based HEMTs with p-type gate submitted to positive gate bias stress. Based on combined electrical and optical testing, we demonstrate the existence of different degradation processes, depending on the applied stress voltage VGstress: 1) for VGstress <; 7 V, no significant degradation is observed, thus demonstrating a good stability of the analyzed technology; 2) for 7 V <; VGstress <; 11.5 V, a negative shift in threshold voltage (Vth) is observed, well correlated with a decrease in the gate leakage current and of the luminescence signal associated with hole injection. The negative Vth shift is ascribed to the trapping of holes in the AlGaN and/or p-GaN/AlGaN interface; and 3) for VGstress ≥ 12 V, threshold voltage recovers its initial value. This is ascribed to a net-negative charge, generated either by the trapping of electrons injected from the 2-D electron gas to the AlGaN or to the de-trapping of the holes injected in 2). The results described within this paper provide relevant information for understanding the degradation dynamics of normally off GaN transistors submitted to extremely high gate voltage levels far beyond maximum use.

Degradation Mechanisms of GaN HEMTs With p-Type Gate Under Forward Gate Bias Overstress