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This paper proposes an original approach to separately characterize self-heating and substrate effects in Fully-Depleted Silicon-on-Insulator (FD-SOI) devices. As both dynamic self-heating and drain to source coupling through the back-gate and substrate of an FD-SOI MOSFET induce a frequency transition in the Y-parameters in a common frequency range, it is crucial to properly separate them for further modeling. The proposed novel method is based on the extraction of the back-gate and substrate networks from the S-parameters measured at the zero-temperature coefficient bias. It enables the accurate and unambiguous extraction of thermal impedance for different biases, thus providing the extraction of the device thermal resistance and capacitance for different power levels from S-parameters measurements.

On the Separate Extraction of Self-Heating and Substrate Effects in FD-SOI MOSFET