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In the standard MOSFET description of the drain current $I_{D}$ as a functionof applied gate voltage $V_{GS}$, the subthreshold swing $SS(T)\equivdV_{GS}/d\log I_{D}$ has a fundamental lower limit as a function of temperature$T$ given by $SS(T) = \ln10~k_BT/e$. However, recent low-temperature studies ofdifferent advanced CMOS technologies have reported $SS$(4K or lower) valuesthat are at least an order of magnitude larger. Here, we present and analyzethe saturation of $SS(T)$ in 28nm fully-depleted silicon-on-insulator (FD-SOI)devices for both n- and p-type MOSFETs of different gate oxide thicknesses andgate lengths down to 4K. Until now, the increase of interface-trap densityclose to the band edge as temperature decreases has been put forward tounderstand the saturation. Here, an original explanation of the phenomenon ispresented by considering a disorder-induced tail in the density of states atthe conduction (valence) band edge for the calculation of the MOS channeltransport by applying Fermi-Dirac statistics. This results in a subthreshold$I_{D}\sim e^{eV_{GS}/k_BT_0}$ for $T_0=35$K with saturation value $SS(T<T_0) =\ln 10~k_BT_0/e$. The proposed model adequately describes the experimental dataof $SS(T)$ from 300 down to 4K using $k_BT_0 \simeq 3$meV for the width of theexponential tail and can also accurately describe $SS(I_{D})$ within the wholesubthreshold region. Our analysis allows a direct determination of thetechnology-dependent band-tail extension forming a crucial element in futurecompact modeling and design of cryogenic circuits.

Cryogenic Subthreshold Swing Saturation in FD-SOI MOSFETs described with Band Broadening