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We derive an analytical model for the depletion capacitance of silicon-on-insulator (SOI) optical modulation diodes. This model accurately describes the parasitic fringe capacitances due to a lateral <i>pn</i> junction and can be extended to other geometries, such as vertical and interdigitated junctions. The model is used to identify the waveguide slab to rib height ratio as a key geometric scaling parameter for the modulation efficiency and bandwidth for lateral diodes. The fringe capacitance is a parasitic effect that leads to a decrease of about 20% in the modulation bandwidth of typical SOI diodes without a corresponding increase in the modulation efficiency. From the scaling relations, the most effective way to increase the modulation bandwidth is to reduce the series resistance of the diode.

Analytical Model and Fringing-Field Parasitics of Carrier-Depletion Silicon-on-Insulator Optical Modulation Diodes