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Requirements for high bandwidth and low power continue to increase in servers and consumer electronics. There are significant challenges in DRAMs to meet all such needs in various applications. In ISSCC 2014, the first LPDDR4 DRAM for mobile applications is demonstrated which has an integrated ECC engine for low-power operation. Next, the first High-Bandwidth Memory (HBM) with 4 TSV stacked layers achieving 128GB/s bandwidth is disclosed. Also, new circuits to reduce standby and I/O power in GDDR5M are shown. The papers in this session present the latest technologies and circuit techniques to improve the performance and power in DRAMs.

Session 25 overview: High-bandwidth low-power DRAM and I/O: Memory subcommittee