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Emerging VLSI technologies and platforms are giving rise tosystems with inherently high potential for runtime failure.Such failures range from intermittent electrical and mechanicalfailures at the system level, to device failures at the chip level.Techniques to provide reliable computation in the presence offailures must do so while maintaining high performance, withan eye toward energy efficiency. When possible, they shouldmaximize battery lifetime in the face of battery discharge non-linearities. This paper introduces the concept of adaptive fault-tolerance management for failure-prone systems, and a classification of local algorithms for achieving system-wide reliability.In order to judge the efficacy of the proposed algorithmsfor dynamic fault-tolerance management, a set of metrics, forcharacterizing system behavior in terms of energy efficiency,reliability, computation performance and battery lifetime, ispresented. For an example platform employed in a realistic evaluation scenario, it is shown that system configurations with the best performance and lifetime are not necessarilythose with the best combination of performance, reliability,battery lifetime and average power consumption.

Dynamic Fault-Tolerance and Metrics for Battery Powered, Failure-Prone Systems