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The structural improvement and rapid production of InP, InAs (III-V, binary), and AlGaAs (III-V, ternary) compound semiconductor materials have invariably enabled its utilization in typical high-speed device applications. Using the electronic simulator tool, the ON- and OFF-state drain current (ION/IOFF performance of InP/InAs/AlGaAs High Electron Mobility Transistors (HEMTs) with Lanthanum Oxide (La2O3) as a dielectric material has been analyzed. Thereafter, a design of cylindrical surrounding gate MOSFET has been planned with this novel heterostructures. The InAs spacer (primary) layer is placed as per requirement below the source and drains the terminal to improve mobility. A heavily doped AlGaAs channel layer is employed beneath the primary layer, followed by the required layers. The given device gate length of LG &#x003D; <italic>5 nm</italic>, source-drain device length <inline-formula> <tex-math notation="LaTeX">$L_{SD} =$ </tex-math></inline-formula> <italic>0.15</italic> <inline-formula> <tex-math notation="LaTeX">$\mu m$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$V_{GS} = V_{DS} =$ </tex-math></inline-formula> <italic>1</italic> <inline-formula> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula> of InP/InAs/Al0.53Ga0.47As HEMT having Equivalent Oxide Thickness (EOT) of La2O3 as <italic>2 nm</italic> (gate dielectric oxide), the measured values of maximum drain current (<inline-formula> <tex-math notation="LaTeX">$I_{D,max}$ </tex-math></inline-formula>), transconductance (<inline-formula> <tex-math notation="LaTeX">$G_{m}$ </tex-math></inline-formula>), Charge carrier density (<inline-formula> <tex-math notation="LaTeX">$\rho$ </tex-math></inline-formula>), and leakage current (<inline-formula> <tex-math notation="LaTeX">$I_{leak}$ </tex-math></inline-formula>) are <italic>10 mA/</italic> <inline-formula> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula><italic>m</italic>, <italic>12 mS/</italic> <inline-formula> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula><italic>m</italic>, <italic>1.5 C/cm</italic> 3, and <inline-formula> <tex-math notation="LaTeX">$0.03 ~\mu A/\mu $ </tex-math></inline-formula> <italic>m,</italic> respectively. The electrostatic potential (<inline-formula> <tex-math notation="LaTeX">$\varphi$ </tex-math></inline-formula>) and electric field (<inline-formula> <tex-math notation="LaTeX">$E$ </tex-math></inline-formula>) are <italic>2.58</italic> <inline-formula> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula> and -<italic>47.12</italic> <inline-formula> <tex-math notation="LaTeX">$V/\mu m$ </tex-math></inline-formula> are obtained when VDS &#x003D; <italic>1</italic> <inline-formula> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula>. This proposed design enhances the heterostructures immune to all the Short Channel Effects (SCEs) in the RF range that can be used in low power circuits design. Furthermore, the rotational cylindrical structure paves the way for a lesser board area to be occupied to reduce heat generation.

Design and Analysis of InP/InAs/AlGaAs Based Cylindrical Surrounding Double-Gate (CSDG) MOSFETs With La2O3 for 5-nm Technology

Design and Analysis of InP/InAs/AlGaAs Based Cylindrical Surrounding Double-Gate (CSDG) MOSFETs With La₂O₃ for 5-nm Technology