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In order to evaluate and validate the latest trends of power-hardware-in-loop (PHIL) test setup, the dc-dc buck converter is modelled within a real-time system where the simulation model of the converter is exported to FPGA NI PXIe with a time step of 250 ns. PHIL setup allows high flexibility, the benefit of graphical programming, and advanced investigation of the control system for a converter without any safety concern and with the possibility of testing against situations that rarely occur in the field. The LabVIEW-FPGA has been used as a prototyping environment for a digital controller with the help of OPAL-RT eHS software and NI hardware. Such collaboration enables other software such as MATLAB/Simulink, Multisim, PLECS, PSIM, and LabVIEW Co-simulation for accelerating innovative research and development. This research work presents a more efficient and effectual NI PXIE platform with at least ten times more FPGA capability. This paper highlights the hardware-software toolset&#x2019;s performance and the proposed methodology by addressing regulation issues in dc-dc converters. For more satisfactory and reliable operation real-time simulation study of a dc-dc buck converter is evaluated at different parametric variations under the closed-loop PI controller. Finally, the executed model&#x2019;s effectiveness for a closed loop buck converter with real DC loads is validated through the hardware-in-loop (HIL) laboratory setup.

Efficient Real-Time Controller Design Test Bench for Power Converter Applications