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This paper presents two designs of a capacitively-coupled chopper instrumentation amplifier (CCIA) successfully implemented in 28 nm CMOS for biopotential sensing applications. The first design is a compact CCIA using offset-blocking for chopping ripple reduction, DC servo loop (DSL) for electrode offset (<inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {EOS}}$ </tex-math></inline-formula>) suppression, and a high pass filter (HPF) for handling common-mode (CM) artifacts. An inverter-based self-biased input stage is used for noise and power efficiency. The two gain stages of the CCIA achieve a low-frequency open-loop gain &#x003E;80 dB. Realized in an area of 0.05 mm<sup>2</sup>, the CCIA handles <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {EOS}}$ </tex-math></inline-formula> up to 50 mV and tolerates CM artifacts up to <inline-formula> <tex-math notation="LaTeX">$1.5~V_{\mathrm {pp}}$ </tex-math></inline-formula>. The CCIA achieves a mid-band gain of 39.5 dB with a 1 kHz bandwidth by consuming <inline-formula> <tex-math notation="LaTeX">$1~\mu \text{W}$ </tex-math></inline-formula>. The integrated input-referred noise (IRN) over 200 Hz bandwidth is <inline-formula> <tex-math notation="LaTeX">$2.15~\mu V_{\mathrm {rms}}$ </tex-math></inline-formula>. The second design presents a dual-channel CCIA (DCCIA) using an orthogonal frequency chopping for multi-sensor array applications. An inverter-based input stage is used for noise efficiency. The measured results show that the DCCIA achieves a low-frequency gain of 39.5 dB with a 3-dB bandwidth up to 1 kHz by consuming <inline-formula> <tex-math notation="LaTeX">$0.71~\mu \text{W}$ </tex-math></inline-formula> per channel. The measured noise density is 136 nV/<inline-formula> <tex-math notation="LaTeX">$\surd $ </tex-math></inline-formula>Hz with an integrated noise of <inline-formula> <tex-math notation="LaTeX">$2.67~\mu V_{\mathrm {rms}}$ </tex-math></inline-formula> over 200 Hz bandwidth. The DCCIA suppresses <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {EOS}}$ </tex-math></inline-formula> up to 50 mV using the DSL. Realized in a compact area of 0.04 mm<sup>2</sup> per channel, an excellent gain matching error of 0.29&#x0025; is achieved with the crosstalk higher than 58 dB between the channels. This work is a measured report on the instrumentation amplifier using, to the best of the authors&#x2019; knowledge, one of the smallest CMOS process nodes.

Area and Power-Efficient Capacitively-Coupled Chopper Instrumentation Amplifiers in 28 nm CMOS for Multi-Channel Biosensing Applications