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We present PULP-NN, an optimized computing library for a parallelultra-low-power tightly coupled cluster of RISC-V processors. The keyinnovation in PULP-NN is a set of kernels for Quantized Neural Network (QNN)inference, targeting byte and sub-byte data types, down to INT-1, tuned for therecent trend toward aggressive quantization in deep neural network inference.The proposed library exploits both the digital signal processing (DSP)extensions available in the PULP RISC-V processors and the cluster'sparallelism, achieving up to 15.5 MACs/cycle on INT-8 and improving performanceby up to 63x with respect to a sequential implementation on a single RISC-Vcore implementing the baseline RV32IMC ISA. Using PULP-NN, a CIFAR-10 networkon an octa-core cluster runs in 30x and 19.6x less clock cycles than thecurrent state-of-the-art ARM CMSIS-NN library, running on STM32L4 and STM32H7MCUs, respectively. The proposed library, when running on GAP-8 processor,outperforms by 36.8x and by 7.45x the execution on energy efficient MCUs suchas STM32L4 and high-end MCUs such as STM32H7 respectively, when operating atthe maximum frequency. The energy efficiency on GAP-8 is 14.1x higher thanSTM32L4 and 39.5x higher than STM32H7, at the maximum efficiency operatingpoint.

philosophical transactions - royal society. mathematical, physical and engineering sciences/philosophical transactions - royal society. mathematical, physical and engineering sciences

PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors