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The high instantaneous luminosities expected following the upgrade of theLarge Hadron Collider (LHC) to the High Luminosity LHC (HL-LHC) pose majorexperimental challenges for the CMS experiment. A central component to allowefficient operation under these conditions is the reconstruction of chargedparticle trajectories and their inclusion in the hardware-based trigger system.There are many challenges involved in achieving this: a large input data rateof about 20--40 Tb/s; processing a new batch of input data every 25 ns, eachconsisting of about 15,000 precise position measurements and rough transversemomentum measurements of particles ("stubs''); performing the patternrecognition on these stubs to find the trajectories; and producing the list oftrajectory parameters within 4 $\mu\,$s. This paper describes a proposedsolution to this problem, specifically, it presents a novel approach to patternrecognition and charged particle trajectory reconstruction using an all-FPGAsolution. The results of an end-to-end demonstrator system, based on XilinxVirtex-7 FPGAs, that meets timing and performance requirements are presentedalong with a further improved, optimized version of the algorithm together withits corresponding expected performance.

FPGA-based tracking for the CMS Level-1 trigger using the tracklet algorithm