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Superconducting digital circuits are a promising approach to buildpackaged-level integrated systems with high energy-efficiency and computationaldensity. In such systems, performance of the data link between chips mounted ona multi-chip module (MCM) is a critical driver of performance. In this work wereport a synchronous data link using Reciprocal Quantum Logic (RQL) enabled byresonant clock distribution on the chip and on the MCM carrier. The simplephysical link has only four Josephson junctions and 3 fJ/bit dissipation,including a 300 W/W cooling overhead. The driver produces a signal with 35\,GHzanalog bandwidth and connects to a single-ended receiver via 20 $\Omega$ NbPassive Transmission Line (PTL). To validate this link, we have designed,fabricated and tested two 32$\times$32 mm$^2$ MCMs with eight 5$\times$5 mm$^2$chips connected serially and powered with a meander clock, and with four10$\times$10 mm$^2$ chips powered with a 2 GHz resonant clock. The meanderclock MCM validates performance of the data link components, and achieved 5.4dB AC bias margin with no degradation relative to individual chip test. Theresonator MCM validates synchronization between chips, with a measured AC biasmargin up to 4.8 dB between two chips. The resonator MCM is capable of poweringcircuits of 4 million Josephson junctions across the four chips with aprojected 10 Gbps serial data rate.

Synchronous Chip-to-Chip Communication with a Multi-Chip Resonator Clock Distribution Network