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One of the primary issues is cardiovascular disease in various countries worldwide. Proper diagnosis of heart disease at the right time can minimise the loss of life in heart patients. One of the most prevalent approaches for identifying and classifying heart-related disorders is the electrocardiogram (ECG). ECG can give information mainly on heart functioning, recording heart rate, and tracking heart rhythms. ECG denoising is one of the important tasks in medical diagnostics because it contains life-saving information about a patient. Before analysing, compressing, and classifying, the ECG signal has to be denoised for better performance. This work proposes a new RTL architecture to perform ECG signal denoising using the Fast Normalised Least Mean Square (FNLMS) technique. The proposed technique achieved higher accuracy when compared with the conventional signal denoising technique. The proposed work is implemented with a Field Programmable Gate Array device (FPGA) to analyse hardware resource utilisation. This work achieves RMSE of 0.027, PRD of 42.126 and SNR of 33.125. This result is high performance when compared with existing works. This work consumed less computational time and hardware resource utilisation when compared with the conventional ECG denoising technique.

An ECG Signal Compression Technique Using Fast Normalised Least Mean Square Algorithm