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The impression of gate dielectric and spacer dielectric on the performance of rectangular core shell double gate junctionless transistor (RCS-DGJLT) using extensive simulations is studied. The RCS-DGJLT brings captivating response in terms of the performance of the device. The effect of gate dielectric and spacer dielectric is studied for the first time in RCS-DGJLT. The performance of the device gets improve on increasing the dielectric constant till core thickness ( tcore ) = 3 nm for shell thickness ( tshell ) = 4 nm. However, beyond core thickness 3 nm, the performance degrades much for high  k  dielectric. Further, the performance is enhanced for  tcore  &gt; 3 nm and higher  k  dielectric on reducing the core doping. The device performance is also studied by incorporating the spacers. It has been shown that the device performance is best at  tcore  = 4 nm with low  k  gate dielectric however, the device performance degrades when high  k  spacer dielectric is used on the same device which is an interesting and different outcome as compared to conventional DGJLT. The ON current and ON/OFF current ratio are improved by ∼3 orders of magnitude using highly doped source/drain region(HD-S/D) with high  k  spacers. The results show that the core is the integral part of the device, any engineering like spacers, gate dielectrics applied to RCS-DGJLT requires the optimization of the core carefully for better device performance.

Correlation of Core Thickness and Core Doping with Gate & Spacer Dielectric in Rectangular Core Shell Double Gate Junctionless Transistor