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With the emerging of Internet of Things (IoT) industry, applications like smart power plugs, security ID tags, home automation and wearable electronic devices all make the demand for low-power WiFi chips impendency. In this paper, a low-power 2.4 GHz 802.11b/g/n WiFi system-on-chip (SoC) is designed and implemented with 40-nm CMOS process, with area of 8.1 mm 2 . The low-power SoC integrates 32-bit microcontroller, 802.11b/g/n WiFi baseband, 2.4 GHz RF transceiver, ample memory space, ADC, 6-channel PWM, flexible I/O interfaces, multi-stage power management module, etc. It has several sleep modes with extremely low leakage current as 0.8 mA/12 µA in light/deep sleep mode and 0.4 µA in shutdown mode to reduce the power consumption. High performance is demonstrated, including Pout (−28 dB/-30 dB EVM) of 20.1 dBm/19.1 dBm and RX sensitivity of −76 dBm/-74 dBm meanwhile the total current of 148.5 mA/146.5 mA (TX) for 54 Mbps OFDM/HT20 MCS7.

A 40-nm low-power WiFi SoC with clock gating and power management strategy