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Enhancement-mode Si/SiGe electron quantum dots have been pursued extensivelyby many groups for \revEdit{their} potential in quantum computing. Most of thereported dot designs utilize multiple metal-gate layers and use Si/SiGeheterostructures with Ge concentration close to 30\%. Here we report thefabrication and low-temperature characterization of quantum dots inSi/Si$_{0.8}$Ge$_{0.2}$ heterostructures using only one metal-gate layer. Wefind that the threshold voltage of a channel narrower than 1 $\mu$m increasesas the width decreases. The higher threshold can be attributed to thecombination of quantum confinement and disorder. We also find that the lower Geratio used here leads to a narrower operational gate bias range. The higherthreshold combined with the limited gate bias range constrains the devicedesign of lithographic quantum dots. We incorporate such considerations in ourdevice design and demonstrate a quantum dot that can be tuned from a single dotto a double dot. The device uses only a single metal-gate layer, greatlysimplifying device design and fabrication.

Fabrication of quantum dots in undoped Si/Si$_{0.8}$Ge$_{0.2}$ heterostructures using a single metal-gate layer